First, please make sure that the burst enable bit is set in the PLX registers (You can read/write the PLX registers by using
P9050_WriteReg(), or similar functions from the WinDriver special library functions for other PLX boards).
In order to perform burst transfers you need to read/write from consecutive addresses. The Block transfer functions in the special WinDriver PLX API already implement this.
Most of today’s PCI chipsets detect the writes and transform them into a burst.
We have had customers who reported reaching 60MB/S this way.
However, many PCI chipsets today do not detect reads, and you will therefore not be able to perform burst reads with these chips.
The transfer rate you can achieve with the PLX 9050 chip is 8-10 MB/S.
There are some PLX9050 settings you can set (pre-fetching) that will allow you to reach 20MB/S on read. More information regarding setting the pre-fetching option can be found on the PLX website. However, please remember that pre-fetching is not good for reading information from a FIFO buffer, since in this mode the PLX 9050 reads MORE data than it really needs.